Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He has been an associate professor in the ECE department of University of Illinois, Urbana-Champaign since 2011. He is a research associate professor in the Coordinated Science Laboratory and an affiliate associate professor in the CS department.
He has published more than 100 refereed journal and conference papers in the areas of FPGA (synthesis, computing, architecture), EDA (system-level/high-level/logic synthesis), GPU (compilation, computing), nanotechnology (device modeling, nano-circuits, nano-architectures), and heterogeneous computing (application mapping for systems with multicore/FPGA/GPU). In the recent years, he is also actively involved with other research directions, such as computational genomics, hardware security, and computation in smart grid. He has served as PI/Co-PI on 17 research grants administered by US Federal agencies as well as the industry with a total amount of funding of $3.3M to support his research so far. In addition, he has been a seconded faculty member for the Illinois ADSC center in Singapore since March 2010, supervising a research group there with a total amount of funding of $2.6M dedicated to his group in ADSC. He has received Five Best Paper Awards (ASPDAC'09, SASP'09, FCCM'11, SAAHPC'11, and CODES+ISSS'13) and numerous other awards.
To name several current projects, he has been leading the successful FCUDA project in the past 4-5 years that uses CUDA language to program FPGAs, offering opportunity to map existing CUDA kernels to FPGAs for low-energy and high-performance computing compared to the GPU solution. It also enables to use a common front end language to target heterogeneous computing platforms that contain both GPUs and FPGAs. Currently, the group is developing a new OpenCL-to-FPGA flow and a network-on-chip solution on FPGA. Another signature project is the development of SPICE-compatible parameterizable compact models for graphene-nanoribbon-based transistors (GNRFETs) that enable circuit-level evaluations of this emerging technology in terms of its energy and performance considering various types of graphene-specific variation sources. The third example is a new DNA error correction tool, called BLESS, that offers the best error-correction quality among the current state-of-the-art tools targeting large DNA data, but only consumes 40X smaller memory compared to other tools. The GNRFET models and the BLESS tool are available to download under the Software section. The FCUDA flow will be made available for downloading in the near future.
Dr. Chen was involved in two startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera and distributed to many customers of Altera worldwide. He is one of the inventors of the xPilot High-level Synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc. Aplus was acquired by Magma in 2003, and AutoESL was acquired by Xilinx in 2011.